A burr judgement and elimination circuit

The present invention discloses a burr eliminating circuit which comprises a delay module which is used for detecting the width of the burr and a delay output module for eliminating the burr problem generated in specific condition. The delay module is connected with a feedback control circuit module...

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Bibliographic Details
Main Authors YAO WEI, YU WEIXUE, WANG CHUANFANG, CHENG JIANTAO, WANG CHAO
Format Patent
LanguageChinese
English
Published 30.12.2009
Subjects
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Summary:The present invention discloses a burr eliminating circuit which comprises a delay module which is used for detecting the width of the burr and a delay output module for eliminating the burr problem generated in specific condition. The delay module is connected with a feedback control circuit module. The delay module controls the feedback control circuit module to reset with an accelerated speed when the burr is detected and sets with an accelerated speed when the valid data is detected. The circuit of the invention totally satisfies the functions of determining and eliminating the burr and can expands the width of the valid narrow pulsewidth signal to a safe width for securing the safe operation.
Bibliography:Application Number: CN2008136221