COLUMN REDUNDANCY CIRCUIT WITH REDUCED SIGNAL PATH DELAY

• Main Authors: MAR, CYNTHIA, WEI, FANGXING, KIKUKAWA, HIROHITO
• Format: Patent
• Language: English; French
• Published: 29.07.2008
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; INFORMATION STORAGE; PHYSICS; STATIC STORES

The invention discloses a synchronous DRAM having memory elements arranged in rows and columns, the memory elements being accessible by decoding a memory address applied thereto, normal column drivers for activating appropriate memory elements in response to decoded column addresses signals; redunda...