TEST, RESET AND COMMUNICATIONS OPERATIONS IN AN ARC FAULT CIRCUIT INTERRUPTER WITH OPTIONAL MEMORY AND/OR BACKUP POWER
An arc fault circuit interrupter system for use with an electrical circuit includes an arcing fault detector which monitors said electrical circuit and a controlle r generates a trip signal in response to the detection of arcing faults. The controller ma y also generate one or more communication sig...
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Main Authors | , , , , |
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Format | Patent |
Language | English French |
Published |
08.11.2005
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | An arc fault circuit interrupter system for use with an electrical circuit includes an arcing fault detector which monitors said electrical circuit and a controlle r generates a trip signal in response to the detection of arcing faults. The controller ma y also generate one or more communication signals corresponding to information relating to t he operation of the arcing fault circuit interrupter. The system may also inclu de one or more of the following: a communication port which communicates to a user the information relating to operation of the arc fault circuit interrupter in response to th e communication signals; a memory for retaining predetermined information related to the condition and operation of the arcing fault circuit interrupter, with or without a backup memory; and a combined self-test/reset switch. |
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Bibliography: | Application Number: CA20002328218 |