GOLD PLATING PROCESS

: The invention provides a process for fabricating devices comprising at least one n-type or intrinsic III-V compound semiconductor material. The process comprises at least one step in which gold is plated on a metallic surface electrically connected to the III-V compound semiconductor by an oxidati...

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Bibliographic Details
Main Authors BUCKLEY, REGINALD R, KOHL, PAUL A, D'ASARO, LUCIAN A, OSTERMAYER, FREDERICK W., JR, WOLOWODIUK, CATHERINE
Format Patent
LanguageEnglish
French
Published 25.03.1986
Edition4
Subjects
APPARATUS THEREFOR
BASIC ELECTRIC ELEMENTS
CHEMISTRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
ELECTROFORMING
ELECTROLYTIC OR ELECTROPHORETIC PROCESSES
METALLURGY
PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS
SEMICONDUCTOR DEVICES
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Summary:: The invention provides a process for fabricating devices comprising at least one n-type or intrinsic III-V compound semiconductor material. The process comprises at least one step in which gold is plated on a metallic surface electrically connected to the III-V compound semiconductor by an oxidation-reduction reaction in an electrolytic solution. The oxidation is carried out by illuminating the III-V compound semiconductor with light with photon energy at least as great as the band gap of the compound semiconductor so as to create holes that permit oxidation of the semiconductor. The electrolytic solution comprises a source of gold which on reduction yields metallic gold, and the source of gold is reduced on the metallic surface to form metallic gold. This provides a reliable procedure for inducing plating at preselected areas on a compound semiconductor structure.
Bibliography:Application Number: CA19820403830