sistemas e metodos para habilitar proteção de esd em dispositivos empilhados em 3d
An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for abso...
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Main Authors | , , |
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Format | Patent |
Language | Portuguese |
Published |
14.02.2018
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Subjects | |
Online Access | Get full text |
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Summary: | An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD events. In one embodiment, an ESD diode is created in a vertical TSV between active layers of the semiconductor dies of a stacked device. This ESD diode can be shared by circuitry on both semiconductor dies of the stack thereby saving space and reducing die area required by ESD protection circuitry. |
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Bibliography: | Application Number: BR2009PI18915 |