Voltage clamping circuit

A voltage clamping circuit includes a PIN diode with a first end connected to a signal line, a capacitor connected between ground and a second end of the PIN diode; and a reference voltage applied to a junction of the PIN diode and the capacitor. Dual arrangements of the clamping circuit may be used...

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Bibliographic Details
Main Authors ALEKSANDR GITSEVICH, DONALD A. MACLENNAN
Format Patent
LanguageEnglish
Published 26.03.2002
Edition7
Subjects
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Summary:A voltage clamping circuit includes a PIN diode with a first end connected to a signal line, a capacitor connected between ground and a second end of the PIN diode; and a reference voltage applied to a junction of the PIN diode and the capacitor. Dual arrangements of the clamping circuit may be used to limit a voltage on the signal line within a desired range. The voltage clamping circuit is effective for protecting RF power transistors from overdrive conditions while operating at frequencies above 300 MHz and power levels in excess of 50 watts. The voltage clamping circuit has minimal adverse impact on circuit operation and efficiency. Specific examples include a power oscillator providing over 170 RF watts at above 700 MHz with the voltage clamping circuit providing protection from destructive feedback.
Bibliography:Application Number: AU19900055001