WIDE BRANCH INSTRUCTION ACCELERATION

A method and system for handling a branch instruction which requires branching from a current instruction of a first instruction sequence to the first instruction of a second instruction sequence. The branch instruction is fetched and the next instruction of the first sequence is fetched while the b...

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Bibliographic Details
Main Authors JAMES B. STEIN, RICHARD W. REEVES, DAVID L. KEATING
Format Patent
LanguageEnglish
Published 25.07.1991
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A method and system for handling a branch instruction which requires branching from a current instruction of a first instruction sequence to the first instruction of a second instruction sequence. The branch instruction is fetched and the next instruction of the first sequence is fetched while the branch instruction is displacement formatted. The first instruction of the second sequence is fetched while such next instruction is displacement formatted and the branch instruction is executed. The second instruction of the second sequence is fetched while the first instruction is displacement formatted, but the next instruction of the first sequence is not executed so that an execution wait occurs. The third instruction of the second sequence is then fetched while the second instruction is displacement formatted and the first instruction is executed.
Bibliography:Application Number: AU19890040264