PROTECTION OF INTERCONNECTS AND DEVICES IN A PACKAGED QUANTUM BIT STRUCTURE

A device (500) comprises a first chip (508) having a first chip front-side and a first chip back-side, a qubit chip (504) having a qubit chip front-side and a qubit chip back-side, the qubit chip front-side operatively coupled to the first chip front-side with a set of bump-bonds (506), a set of thr...

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Bibliographic Details
Main Authors COTTE, John, PETRARCA, Kevin Shawn, ABRAHAM, David, DIAL, Oliver
Format Patent
LanguageEnglish
Published 11.07.2024
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:A device (500) comprises a first chip (508) having a first chip front-side and a first chip back-side, a qubit chip (504) having a qubit chip front-side and a qubit chip back-side, the qubit chip front-side operatively coupled to the first chip front-side with a set of bump-bonds (506), a set of through-silicon vias (TSVs) connected to at least one of the first chip back-side or the qubit chip back-side, and a cap wafer (502) that is metal bonded to at least one of the qubit chip back-side or the first chip back-side. Preferably, the qubits and the TSVs are superconducting, and the cap wafer features a cavity that comprises a metal coating on its inside surface for electromagnetic shielding.
Bibliography:Application Number: AU20210399002