Data processing device and data processing method

The present invention relates to a data processing apparatus (12) and a data processing method which can improve the tolerance to errors of data. A multiplexer (54) allocates by means of re-arranging, in accordance with an allocation rule for allocating code bits of an LDPC code as defined in the DV...

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Bibliographic Details
Main Authors TAKASHI YOKOKAWA, LUI SAKAI, RYOJI IKEGAYA, SATOSHI OKADA, MAKIKO YAMAMOTO
Format Patent
LanguageEnglish
Published 19.08.2010
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Summary:The present invention relates to a data processing apparatus (12) and a data processing method which can improve the tolerance to errors of data. A multiplexer (54) allocates by means of re-arranging, in accordance with an allocation rule for allocating code bits of an LDPC code as defined in the DVB-S2 specification to symbol bits representative of symbols, mb symbol bits of b consecutive m-bit symbols to mb code bits. According to the allocation rule, where groups into which the code bits and the symbol bits are to be grouped in response to an error probability thereof are set as code bit groups and symbol bit groups, respectively, a combination of any of the code bit groups and the symbol bit group of the symbol bits to which the code bits of the code bit group are to be allocated and bit numbers of the code bits and the symbols bits are prescribed. The data processing apparatus further comprises a column-twist deinterleaver (55) and a parity deinterleaver (1011).
Bibliography:Application Number: AU20080330666