Folded memory layers

In a ferroelectric or electret volumetric memory device with a memory material provided in sandwich between first and second electrode layers (2; 4) with stripe-like electrodes forming word lines (2) and bit lines (4) of a matrix-addressable memory array (M), memory cells are defined in volumes of m...

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Bibliographic Details
Main Authors HANS GUDE GUDESEN, PER-ERIK NORDAL
Format Patent
LanguageEnglish
Published 15.02.2007
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:In a ferroelectric or electret volumetric memory device with a memory material provided in sandwich between first and second electrode layers (2; 4) with stripe-like electrodes forming word lines (2) and bit lines (4) of a matrix-addressable memory array (M), memory cells are defined in volumes of memory material in between two crossing word lines (2) and bit lines (4) and a plurality of memory arrays are provided in a stacked arrangement. A stack (S) of memory arrays (M) is formed by two or more ribbon-like structures (R), which are folded and/or braided into each other. Each ribbon-like structure (R) comprises a flexible substrate (3) of non-conducting material and the electrode layers (2; 4) provided on each surface of the substrate and comprising the parallel strip-like electrodes extending along the ribbon-like structure (R). A layer of memory material (1) covers one of the electrode layers whereby each memory array (M) of the stack (S) is formed by overlapping portions of a pair of adjacent ribbon-like structures (Rk, Rk+1) and crossing in substantially orthogonal relationship.
Bibliography:Application Number: AU20020348540