An FFT Core for DVB-T/DVB-H Receivers
This paper presents the design and implementation of a 2K/4K/8K multiple mode FFT core for DVB-T/DVB-H receivers. The proposed core is based on a pipeline radix-22 SDF architecture. The necessary changes in the radix-22 SDF architecture to achieve an efficient FFT implementation are detailed. Quanti...
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Published in | VLSI design (Yverdon, Switzerland) Vol. 2008; no. 2008; pp. 1 - 9 |
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Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
Cairo, Egypt
Hindawi Puplishing Corporation
2008
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Online Access | Get full text |
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Summary: | This paper presents the design and implementation of a 2K/4K/8K multiple mode FFT core for DVB-T/DVB-H receivers. The proposed core is based on a pipeline radix-22 SDF architecture. The necessary changes in the radix-22 SDF architecture to achieve an efficient FFT implementation are detailed. Quantization effects and timing design parameters are analyzed for DVB-T/DVB-H. Area and power results are provided for the proposed core. |
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ISSN: | 1065-514X 1563-5171 |