56nm pitch Cu dual-damascene interconnects with self-aligned via using negative-tone development Lithography-Etch-Lithography-Etch patterning scheme

Via chain SEM cross section along M1 line direction (left) and along M2 line direction (right) [Display omitted] ► 56nm pitch Cu-dual-damascene interconnects demonstrated. ► Double patterning Lithography-Etch-Lithography-Etch patterning scheme. ► Self Align Via process and integration are used. ► Go...

Full description

Saved in:
Bibliographic Details
Published inMicroelectronic engineering Vol. 107; pp. 138 - 144
Main Authors Loquet, Yannick, Mignot, Yann, Waskiewicz, Christopher, Chen, James Hsueh-Chung, Sankarapandian, Muthumanickam, Chen, Shyng-Tsong, Flaitz, Philip, Tomizawa, Hideyuki, Tseng, Chia-Hsun, Beard, Marcy, Morris, Bryan, Kleemeier, Walter, Liniger, E., Spooner, Terry
Format Journal Article
LanguageEnglish
Published Elsevier B.V 01.07.2013
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Via chain SEM cross section along M1 line direction (left) and along M2 line direction (right) [Display omitted] ► 56nm pitch Cu-dual-damascene interconnects demonstrated. ► Double patterning Lithography-Etch-Lithography-Etch patterning scheme. ► Self Align Via process and integration are used. ► Good yield and reliability have been achieved with a cap retention integration. ► Novel wet process to remove the hard-mask has been developed. In the attempts to push the resolution limits of 193nm immersion lithography, this work demonstrates the building of 3 metal level 56nm pitch copper dual-damascene interconnects, using Negative-Tone Development Lithography-Etch-Lithography-Etch (LELE) Patterning at line level. Line Resistance and intra-level capacitance can be affected by the double patterning integration, but a good process window has been demonstrated, showing no impact on RC performance. The introduction of a self-aligned via (SAV) process with a TiN hard-mask is able to provide a robust process window in terms of via-metal short yield at line and via level. SAV implementation at these dimensions also affects the aspect-ratio of the structures and leads to new challenges in metallization: optimized profile, without bowing or undercut, is mandatory to enable the filling of 28nm lines. The metal hard-mask has to be removed or at least faceted by erosion. This can be achieved by conventional RIE process optimization, but pushes the RIE selectivity to challenging limits. Physical dimensions on target and via chain yield have been demonstrated by fine tuning RIE process. Profile improvement can also be achieved by the introduction of new WET process, helping the removal of the metal hard-mask while being neutral to the ULK. We have demonstrated good yield and reliability with an integration using hard-mask wet removal.
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2012.09.008