APA (7th ed.) Citation

Chen, H., Wang, Y., Yang, H., Ding, L., Liu, W., Deng, J., . . . Nie, B. (2025). Design of a Floating-bulk NMOS Triggered GGNMOS with Low Triggering Voltage and High Robustness Aimed at 3.3 V I/O ESD Protectio. Journal of semiconductor technology and science, 25(3), 218-227. https://doi.org/10.5573/JSTS.2025.25.3.218

Chicago Style (17th ed.) Citation

Chen, Haotian, Yang Wang, Hongjiao Yang, Liqiang Ding, Wei Liu, Jun Deng, Fengfeng Zhou, and Beibei Nie. "Design of a Floating-bulk NMOS Triggered GGNMOS with Low Triggering Voltage and High Robustness Aimed at 3.3 V I/O ESD Protectio." Journal of Semiconductor Technology and Science 25, no. 3 (2025): 218-227. https://doi.org/10.5573/JSTS.2025.25.3.218.

MLA (9th ed.) Citation

Chen, Haotian, et al. "Design of a Floating-bulk NMOS Triggered GGNMOS with Low Triggering Voltage and High Robustness Aimed at 3.3 V I/O ESD Protectio." Journal of Semiconductor Technology and Science, vol. 25, no. 3, 2025, pp. 218-227, https://doi.org/10.5573/JSTS.2025.25.3.218.