Evaluation of a gate-first process for AIGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors with low ohmic annealing temperature
In this paper, TiN/A1Ox gated A1GaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOS- HFETs) were fabricated for gate-first process evaluation. By employing a low temperature ohmic process, ohmic contact can be obtained by annealing at 600 ℃ with the contact resistance app...
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Published in | 中国物理B:英文版 no. 3; pp. 445 - 447 |
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Main Author | |
Format | Journal Article |
Language | English |
Published |
2016
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Subjects | |
Online Access | Get full text |
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Summary: | In this paper, TiN/A1Ox gated A1GaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOS- HFETs) were fabricated for gate-first process evaluation. By employing a low temperature ohmic process, ohmic contact can be obtained by annealing at 600 ℃ with the contact resistance approximately 1.6 Ω.mm. The ohmic annealing process also acts as a post-deposition annealing on the oxide film, resulting in good device performance. Those results demonstrated that the TiN/A1Ox gated MOS-HFETs with low temperature ohmic process can be applied for self-aligned gate AIGaN/GaN MOS-HFETs. |
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Bibliography: | 11-5639/O4 metal-oxide-semiconductor heterostructure field-effect transistors, low temperature ohmic pro-cess, inductively coupled plasma In this paper, TiN/A1Ox gated A1GaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOS- HFETs) were fabricated for gate-first process evaluation. By employing a low temperature ohmic process, ohmic contact can be obtained by annealing at 600 ℃ with the contact resistance approximately 1.6 Ω.mm. The ohmic annealing process also acts as a post-deposition annealing on the oxide film, resulting in good device performance. Those results demonstrated that the TiN/A1Ox gated MOS-HFETs with low temperature ohmic process can be applied for self-aligned gate AIGaN/GaN MOS-HFETs. |
ISSN: | 1674-1056 2058-3834 |