A low-power DC offset independent of IF gain calibration method for zero-IF receiver

A novel low-power DC offset calibration （DCOC） method independent of intermediate frequency （IF） gain for zero-IF receiver applications has been reported. The conventional analog DCOC method consumes greater power and affects the performance of the receiver. The conventional mixed-signal method requ...

Full description

Saved in:
Bibliographic Details
Published in中国科学：信息科学（英文版） no. 10; pp. 209 - 218
Main Author DONG JingJing JIANG HanJun ZHANG LingWei WEI JianJun LI FuLe ZHANG Chun WANG ZhiHua
Format Journal Article
LanguageEnglish
Published 2014
Subjects
CMOS技术
低功率
增益
接收器
校准方法
直流偏移
直流偏置
零中频
Online AccessGet full text

Cover

More Information
Summary:A novel low-power DC offset calibration （DCOC） method independent of intermediate frequency （IF） gain for zero-IF receiver applications has been reported. The conventional analog DCOC method consumes greater power and affects the performance of the receiver. The conventional mixed-signal method requires enhanced memory to store the calibration results at different receiver gains as the DC offset is relative to the radio frequency （RF） and IF gain. A novel algorithm is presented to make the DCOC process independent of IF gain, which significantly reduces the memory area. With the proposed circuit, the receiver calibrates only once so settle-time and power consumption of the IF circuit is lowered. A DCOC circuit with the proposed method is manufactured in 0.18 p.m CMOS technology that drains nearly 0 mA equivalent current from a 1.8 V power supply.
Bibliography:11-5847/TP
DC offset calibration, zero-IF receiver, PGA, digital to analog converter, comparator
A novel low-power DC offset calibration （DCOC） method independent of intermediate frequency （IF） gain for zero-IF receiver applications has been reported. The conventional analog DCOC method consumes greater power and affects the performance of the receiver. The conventional mixed-signal method requires enhanced memory to store the calibration results at different receiver gains as the DC offset is relative to the radio frequency （RF） and IF gain. A novel algorithm is presented to make the DCOC process independent of IF gain, which significantly reduces the memory area. With the proposed circuit, the receiver calibrates only once so settle-time and power consumption of the IF circuit is lowered. A DCOC circuit with the proposed method is manufactured in 0.18 p.m CMOS technology that drains nearly 0 mA equivalent current from a 1.8 V power supply.
ISSN:1674-733X
1869-1919