Low power digitally controlled oscillator designs with a novel 3-transistor XNOR gate

Digital controlled oscillators（DCOs） are the core of all digital phase locked loop（ADPLL） circuits. Here,DCO structures with reduced hardware and power consumption having full digital control have been proposed. Three different DCO architectures have been proposed based on ring based topology.Three,...

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Bibliographic Details
Published in半导体学报 Vol. 33; no. 3; pp. 52 - 59
Main Author Manoj Kumar Sandeep K. Arya Sujata Pandey
Format Journal Article
LanguageChinese
Published 2012
Subjects
NMOS
PMOS晶体管
交换网络
低功耗
开关网络
或非门
数字控制振荡器
设计
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Summary:Digital controlled oscillators（DCOs） are the core of all digital phase locked loop（ADPLL） circuits. Here,DCO structures with reduced hardware and power consumption having full digital control have been proposed. Three different DCO architectures have been proposed based on ring based topology.Three,four and five bit controlled DCO with NMOS,PMOS and NMOS PMOS transistor switching networks are presented.A three-transistor XNOR gate has been used as the inverter which is used as the delay cell.Delay has been controlled digitally with a switch network of NMOS and PMOS transistors.The three bit DCO with one NMOS network shows frequency variations of 1.6141-1.8790 GHz with power consumption variations 251.9224-276.8591μW. The four bit DCO with one NMOS network shows frequency variation of 1.6229-1.8868 GHz with varying power consumption of 251.9225-278.0740μW.A six bit DCO with one NMOS switching network gave an output frequency of 1.7237-1.8962 GHz with power consumption of 251.928-278.998μW.Output frequency and
Bibliography:Manoj Kumar,Sandeep K.Arya,and Sujata Pandey 1 Department of Electronics ＆ Communication Engineering,Guru Jambheshwar University of Science ＆ Technology, Hisar,India 2 Amity University,Noida,India
11-5781/TN
digital control oscillator; delay cell; power consumption; voltage controlled oscillators
Digital controlled oscillators（DCOs） are the core of all digital phase locked loop（ADPLL） circuits. Here,DCO structures with reduced hardware and power consumption having full digital control have been proposed. Three different DCO architectures have been proposed based on ring based topology.Three,four and five bit controlled DCO with NMOS,PMOS and NMOS PMOS transistor switching networks are presented.A three-transistor XNOR gate has been used as the inverter which is used as the delay cell.Delay has been controlled digitally with a switch network of NMOS and PMOS transistors.The three bit DCO with one NMOS network shows frequency variations of 1.6141-1.8790 GHz with power consumption variations 251.9224-276.8591μW. Th
ISSN:1674-4926