Edge-guided inverse design of digital metamaterial-based mode multiplexers for high-capacity multi-dimensional interconnect

The escalating demands of compute-intensive applications urgently necessitate the adoption of optical interconnect technologies to overcome bottlenecks in scaling computing systems. This requires fully exploiting the inherent parallelism of light across scalable dimensions for data loading. Here we...

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Main Authors Sun, Aolong, Xing, Sizhe, Deng, Xuyu, Shen, Ruoyu, Yan, An, Hu, Fangchen, Yuan, Yuqin, Dong, Boyu, Zhao, Junhao, Huang, Ouhan, Li, Ziwei, Shi, Jianyang, Zhou, Yingjun, Shen, Chao, Zhao, Yiheng, Hong, Bingzhou, Chu, Wei, Zhang, Junwen, Cai, Haiwen, Chi, Nan
Format Journal Article
LanguageEnglish
Published 09.10.2024
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Summary:The escalating demands of compute-intensive applications urgently necessitate the adoption of optical interconnect technologies to overcome bottlenecks in scaling computing systems. This requires fully exploiting the inherent parallelism of light across scalable dimensions for data loading. Here we experimentally demonstrate a synergy of wavelength- and mode- multiplexing combined with high-order modulation formats to achieve multi-tens-of-terabits-per-second optical interconnects using foundry-compatible silicon photonic circuits. Implementing an edge-guided analog-and-digital optimization method that integrates high efficiency with fabrication robustness, we achieve the inverse design of mode multiplexers based on digital metamaterial waveguides. Furthermore, we employ a packaged five-mode multiplexing chip, achieving a single-wavelength interconnect capacity of 1.62 Tbit s-1 and a record-setting multi-dimensional interconnect capacity of 38.2 Tbit s-1 across 5 modes and 88 wavelength channels, with high-order formats up to 8-ary pulse-amplitude-modulation (PAM). This study highlights the transformative potential of optical interconnect technologies to surmount the constraints of electronic links, thus setting the stage for next-generation datacenter and optical compute interconnects.
DOI:10.48550/arxiv.2410.07572