An On-Chip Multi-mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-power Domain SoC Using a 65-nm Standard CMOS Logic Process
In this paper, we propose an on-chip dc-dc buck converter for fine-grain dynamic voltage scaling (DVS) on a multi-power domain SoC. The proposed circuit converts from the I/O voltage to the required core operating voltage. This regulator is equipped with the programmable output buffer and the switch...
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Published in | Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation pp. 336 - 346 |
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Main Authors | , , , , , |
Format | Book Chapter |
Language | English |
Published |
Berlin, Heidelberg
Springer Berlin Heidelberg
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Series | Lecture Notes in Computer Science |
Subjects | |
Online Access | Get full text |
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Summary: | In this paper, we propose an on-chip dc-dc buck converter for fine-grain dynamic voltage scaling (DVS) on a multi-power domain SoC. The proposed circuit converts from the I/O voltage to the required core operating voltage. This regulator is equipped with the programmable output buffer and the switching signal modulator according to the module operating condition. The proposed converter is fabricated with a 65-nm standard CMOS logic process within the area of 5 bonding pads. The maximum power efficiency is over 88%, and the leakage current in the deep stand-by mode is measured only 19 nA. |
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ISBN: | 9783642118012 3642118011 |
ISSN: | 0302-9743 1611-3349 |
DOI: | 10.1007/978-3-642-11802-9_38 |