Efficient Partial Roll-Backing Mechanism for Transactional Memory Systems
Transactional memory systems promise to reduce the burden of exposing thread-level parallelism in programs by relieving programmers from analyzing complex inter-thread dependences in detail. By encapsulating large program code blocks and executing them as atomic blocks, dependence checking is deferr...
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Published in | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) Vol. 6590; pp. 256 - 274 |
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Main Author | |
Format | Book Chapter Journal Article |
Language | English |
Published |
Berlin, Heidelberg
Springer Berlin Heidelberg
2011
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Series | Lecture Notes in Computer Science |
Subjects | |
Online Access | Get full text |
ISBN | 3642194478 9783642194474 |
ISSN | 0302-9743 1611-3349 1611-3349 |
DOI | 10.1007/978-3-642-19448-1_14 |
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Summary: | Transactional memory systems promise to reduce the burden of exposing thread-level parallelism in programs by relieving programmers from analyzing complex inter-thread dependences in detail. By encapsulating large program code blocks and executing them as atomic blocks, dependence checking is deferred to run-time. One of many conflicting transactions will then be committed whereas the others will have to roll-back and re-execute. In current proposals, a checkpoint is taken at the beginning of the atomic block and all execution can be wasted even if the conflicting access happens at the end of the atomic block.
In this paper, we propose a novel scheme that (1) predicts when the first conflicting access occurs and (2) inserts a checkpoint before it is executed. When the prediction is correct, the only execution discarded is the one that has to be re-done. When the prediction is incorrect, the whole transaction has to be re-executed just as before. Overall, we find that our scheme manages to maintain high prediction accuracy and leads to a quite significant reduction in the number of lost cycles due to roll-backs; the geometric mean speedup across five applications is 16%. |
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Bibliography: | This research is sponsored by the SARC project funded by the EU under FET. The authors are members of HiPEAC – a Network of Excellence funded by the EU under FP6. |
ISBN: | 3642194478 9783642194474 |
ISSN: | 0302-9743 1611-3349 1611-3349 |
DOI: | 10.1007/978-3-642-19448-1_14 |