Design Space Exploration of Media Processors: A Generic VLIW Architecture and a Parameterized Scheduler
This paper presents a new environment for exploring and optimizing VLIW architectures for multimedia applications. The environment consists of a generic VLIW architecture, in which virtually all characteristics can be changed, and an assembler with the corresponding parameterized scheduler based on...
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Published in | Architecture of Computing Systems - ARCS 2007 pp. 254 - 267 |
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Main Authors | , , , |
Format | Book Chapter |
Language | English |
Published |
Berlin, Heidelberg
Springer Berlin Heidelberg
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Series | Lecture Notes in Computer Science |
Subjects | |
Online Access | Get full text |
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Summary: | This paper presents a new environment for exploring and optimizing VLIW architectures for multimedia applications. The environment consists of a generic VLIW architecture, in which virtually all characteristics can be changed, and an assembler with the corresponding parameterized scheduler based on an enhanced version of the list scheduling algorithm. A novel partitioned register file architecture is proposed and analyzed with this environment. This is performed using a highly time consuming task of the H.264 video decoder application. Performance improvements of up to 67% can be achieved when running this application on different architecture configurations. |
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ISBN: | 3540712674 9783540712671 |
ISSN: | 0302-9743 1611-3349 |
DOI: | 10.1007/978-3-540-71270-1_19 |