Combining Flash Memory and FPGAs to Efficiently Implement a Massively Parallel Algorithm for Content-Based Image Retrieval

With ever larger and more affordable storage capabilities, individuals and companies can now collect huge amounts of multimedia data, especially images. Searching such databases is still an open problem, known as content-based image retrieval (CBIR). In this paper, we present a hardware architecture...

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Bibliographic Details
Published inReconfigurable Computing: Architectures, Tools and Applications pp. 247 - 258
Main Authors Chikhi, Rayan, Derrien, Steven, Noumsi, Auguste, Quinton, Patrice
Format Book Chapter
LanguageEnglish
Published Berlin, Heidelberg Springer Berlin Heidelberg
SeriesLecture Notes in Computer Science
Subjects
Distance Computation
Hardware Architecture
Image Database
Local Descriptor
Query Image
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Summary:With ever larger and more affordable storage capabilities, individuals and companies can now collect huge amounts of multimedia data, especially images. Searching such databases is still an open problem, known as content-based image retrieval (CBIR). In this paper, we present a hardware architecture based on FPGAs which aims at speeding-up visual CBIR.Our architecture is based on the unique combination of reconfigurable resources combined to Flash memory, and allows for a speed-up of 45 as compared to existing software solutions.
ISBN:3540714308
9783540714309
ISSN:0302-9743
1611-3349
DOI:10.1007/978-3-540-71431-6_23