An 833MHz 1.5W 18Mb CMOS SRAM with 1.67Gb/s/pin
An 18 Mb complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) operating at 833MHz was studied. The SRAM was fabricated in a 0.18 mu m CMOS process with four levels of copper interconnects. High-frequency operations in SRAM were achieved by managing data timing constraint...
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Published in | Digest of technical papers - IEEE International Solid-State Circuits Conference |
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Main Authors | , , , , , , , |
Format | Journal Article |
Language | English |
Published |
01.01.2000
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Online Access | Get full text |
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Summary: | An 18 Mb complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) operating at 833MHz was studied. The SRAM was fabricated in a 0.18 mu m CMOS process with four levels of copper interconnects. High-frequency operations in SRAM were achieved by managing data timing constraints associated with high-frequency operation, maintaining coherency between SRAM output data timings and echo clock timings and delivering symmetric data windows. |
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Bibliography: | SourceType-Scholarly Journals-2 ObjectType-Feature-2 ObjectType-Conference Paper-1 content type line 23 SourceType-Conference Papers & Proceedings-1 ObjectType-Article-3 |
ISSN: | 0193-6530 |