A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit

A low-power 802.11abg SoC which achieves the best reported sensitivity as well as lowest reported power consumption and utilizes an extensive array of auto calibrations is reported. This SoC utilizes a two-antenna array receiver to build a single [abstract truncated by publisher].

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 43; no. 5; pp. 1101 - 1118
Main Authors Afsahi, A, Rael, J J, Behzad, A, Chien, Hung-Ming, Pan, M, Au, S., Ojo, A, Lee, C P, Anand, S B, Chien, K, Wu, S., Roufoogaran, R, Zolfaghari, A, Leete, J C, Tran, Long, Carter, K A, Nariman, M, Yeung, K.W.-K., Morton, W
Format Journal Article
LanguageEnglish
Published 01.05.2008
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Summary:A low-power 802.11abg SoC which achieves the best reported sensitivity as well as lowest reported power consumption and utilizes an extensive array of auto calibrations is reported. This SoC utilizes a two-antenna array receiver to build a single [abstract truncated by publisher].
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9200
DOI:10.1109/JSSC.2008.920338