Row-column parallel turbo decoding of product codes

A row-column, parallel architecture of a turbo decoder dedicated to product codes is presented. This architecture enables simultaneous decoding of the row and the column of a block. The performance of the proposed row-column parallel turbo decoder is similar to that of a conventional turbo decoder....

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Bibliographic Details
Published inElectronics letters Vol. 42; no. 5; p. 1
Main Authors Jégo, C, Adde, P
Format Journal Article
LanguageEnglish
Published Stevenage John Wiley & Sons, Inc 02.03.2006
Subjects
Architecture
Blocking
Decoders
Decoding
Reconstruction
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Summary:A row-column, parallel architecture of a turbo decoder dedicated to product codes is presented. This architecture enables simultaneous decoding of the row and the column of a block. The performance of the proposed row-column parallel turbo decoder is similar to that of a conventional turbo decoder. However, this new architecture reduces the decoding latency by a factor of two. Moreover, the memory necessary for the block reconstruction between row decoding and column decoding is removed.
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ISSN:0013-5194
1350-911X