A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 [Formula Omitted]m[Formula Omitted] 1T1R Bit Cell in 32 nm High-k Metal-Gate CMOS

A 4 kb high-density PROM array featuring the first high-volume manufacturable metal-fuse technology in 32 nm high-k metal-gate CMOS is introduced. In contrast to traditional salicided polysilicon based 2-D fuse cells, the metal-fuse technology enables a 3-D cell topology with program device and fuse...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 45; no. 4; pp. 863 - 868
Main Authors Kulkarni, Sarvesh H, Chen, Zhanping, He, Jun, Jiang, Lei, Pedersen, M. Brian, Zhang, Kevin
Format Journal Article
LanguageEnglish
Published New York The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01.04.2010
Subjects
Arrays
Asymmetry
Circuits
CMOS
Footprints
Fuses
Programming
Three dimensional
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Summary:A 4 kb high-density PROM array featuring the first high-volume manufacturable metal-fuse technology in 32 nm high-k metal-gate CMOS is introduced. In contrast to traditional salicided polysilicon based 2-D fuse cells, the metal-fuse technology enables a 3-D cell topology with program device and fuse element stacked on each other, achieving a 1.37[Formula Omitted]m[Formula Omitted] cell footprint. The 128-row by 32-column array with an asymmetric tunable static sense scheme can operate down to 0.5 V and provides multi-bit programming capability. Programming success using a 2 V-1[Formula Omitted]s pulse condition is demonstrated. The technology is scalable and maintains full compatibility with modern high-k metal-gate processes.
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ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2010.2040115