Characteristics of [Formula Omitted] /Poly-Si Interfacial Layer on CMOS LTPS-TFTs With [Formula Omitted] Gate Dielectric and [Formula Omitted] Plasma Surface Treatment

In this paper, high-performance complementary-metal-oxide-semiconductor low-temperature polycrystalline-silicon thin-film transistors (CMOS LTPS-TFTs) with HfO sub(2) gate dielectric are fabricated on one wafer for the first time. Low threshold voltage and excellent subthreshold swing can be achieve...

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Bibliographic Details
Published inIEEE transactions on electron devices Vol. 55; no. 12; p. 3489
Main Authors Ma, Ming-Wen, Chiang, Tsung-Yu, Wu, Woei-Cherng, Chao, Tien-Sheng, Lei, Tan-Fu
Format Journal Article
LanguageEnglish
Published New York The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01.12.2008
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Summary:In this paper, high-performance complementary-metal-oxide-semiconductor low-temperature polycrystalline-silicon thin-film transistors (CMOS LTPS-TFTs) with HfO sub(2) gate dielectric are fabricated on one wafer for the first time. Low threshold voltage and excellent subthreshold swing can be achieved simultaneously for N- and P-channel LTPS-TFTs without hydrogenation. In addition, the impacts of the HfO sub(2) /poly-Si interfacial layer on N- and P-channel LTPS-TFTs are also specified. In order to enhance the characteristics of HfO sub(2) LTPS-TFT further, oxygen plasma surface treatment is employed to improve the interface quality and passivate the defects of channel grain boundaries, thus increasing the carrier mobility and reducing the phonon scattering. The CMOS LTPS-TFTs with HfO sub(2) gate dielectric and oxygen plasma treatment would be suitable for the application of system-on-panel.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
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content type line 23
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2008.2006543