Formal Pervasive Verification of a Paging Mechanism

Memory virtualization by means of demand paging is a crucial component of every modern operating system. The formal verification is challenging since reasoning about the page fault handler has to cover two concurrent computational sources: the processor and the hard disk. We accurately model the int...

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Bibliographic Details
Published inTools and Algorithms for the Construction and Analysis of Systems Vol. 4963; pp. 109 - 123
Main Authors Alkassar, Eyad, Schirmer, Norbert, Starostin, Artem
Format Book Chapter
LanguageEnglish
Published Germany Springer Berlin / Heidelberg 2008
Springer Berlin Heidelberg
SeriesLecture Notes in Computer Science
Subjects
Hard Disk
Page Fault
Physical Machine
Physical Memory
Virtual Machine
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Summary:Memory virtualization by means of demand paging is a crucial component of every modern operating system. The formal verification is challenging since reasoning about the page fault handler has to cover two concurrent computational sources: the processor and the hard disk. We accurately model the interleaved executions of devices and the page fault handler, which is written in a high-level programming language with inline assembler portions. We describe how to combine results from sequential Hoare logic style reasoning about the page fault handler on the low-level concurrent machine model. To the best of our knowledge this is the first example of pervasive formal verification of software communicating with devices.
ISBN:3540787992
9783540787990
ISSN:0302-9743
1611-3349
DOI:10.1007/978-3-540-78800-3_9