A SWITCHED OPAMP BASED 10 BITS INTEGRATED ADC FOR ULTRA LOW POWER APPLICATIONS

• Published in: VLSI-SOC pp. 133 - 147
• Main Authors: Bonfini, Giuseppe, Brogna, Andrea S., Saletti, Roberto, Garbossa, Cristian, Colombini, Luca, Bacci, Maurizio, Chicca, Stefania, Bigongiari, Franco
• Format: Book Chapter
• Language: English
• Published: United States Kluwer Academic Publishers 2006; Springer US
• Series: IFIP International Federation for Information Processing
• Subjects: Analog To Digital Converter; Biomedical Implantable Applications; Switched OpAmp; Ultra Low Power
• ISBN: 9780387334028; 0387334025
• ISSN: 1571-5736
• DOI: 10.1007/0-387-33403-3_9

This paper describes an ultra low-power switched opamp-based integrated ADC designed using a cyclic algorithm approach, for cardiac pacemaker applications. The AID converter shows a typical operating power consumption of 8.18 μW for the analog part and of 9.71 μW for the digital one, whereas the stand by dissipation is about 1 nW and 5 nW, respectively, (measured on 10 chip samples and averaged), considering a typical supply of 2.8 V. The ADC resolution is 10 b, its typical operating clock frequency is 32 kHz (sampling rate is 2.9 kSamples/s) and it is able to reach the same resolution at 2 V, with 0.7 kSamples/s sampling rate, showing a dissipation of 1 μW for the analog part and 1.3 μW for the digital part. Moreover, it is also characterized by low offset and no missing codes.