Design of a Reconfigurable Cryptographic Engine

• Published in: Advances in Computer Systems Architecture pp. 452 - 458
• Main Authors: Sun, Kang, Ping, Lingdi, Wang, Jiebing, Liu, Zugen, Pan, Xuezeng
• Format: Book Chapter Conference Proceeding
• Language: English
• Published: Berlin, Heidelberg Springer Berlin Heidelberg 2006; Springer
• Series: Lecture Notes in Computer Science
• Subjects: Applied sciences; Asynchronous Circuit; Computers, microcomputers; Cryptographic Algorithm; Electronics; Exact sciences and technology; Hardware; Hash Family; Integrated circuits; Integrated circuits by function (including memories and processors); Logic Cell; Operation Circuit; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Kernels; High performance; Asynchronous; Shortage; Asynchronism; Computer architecture; Field programmable gate array; Reconfigurable architectures; Cryptography; Logic; Distributed computing; Reconfiguration
• ISBN: 9783540400561; 3540400567
• ISSN: 0302-9743; 1611-3349
• DOI: 10.1007/11859802_43

Cryptographic algorithms are usually compute-intensive and more efficiently implemented in hardware than in software. By taking advantage of FPGA technology, some work offers high performance and flexible solutions for cryptographic algorithms. But FPGAs still have some drawbacks. To overcome inherent shortages of FPGA, a novel asynchronous reconfigurable cryptographic engine (ARCEN) is introduced. In this architecture, reconfigurable cryptographic array is the kernel. It routes signals asynchronously between adjacent cells through Neighbor-to-Neighbor wires with 4-phase handshaking protocol. Computation circuit for reconfigurable cell is developed with modified DSDCVS logic. Experiment results show that the architecture has a better performance than FPGA.