Model Checking Prioritized Timed Automata

Priorities are often used to resolve conflicts in timed systems. However, priorities are not directly supported by state-of-art model checkers. Often, a designer has to either abstract the priorities leading to a high degree of non-determinism or model the priorities using existing primitives. In th...

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Bibliographic Details
Published inAutomated Technology for Verification and Analysis pp. 370 - 384
Main Authors Lin, Shang-Wei, Hsiung, Pao-Ann, Huang, Chun-Hsian, Chen, Yean-Ru
Format Book Chapter Conference Proceeding
LanguageEnglish
Published Berlin, Heidelberg Springer Berlin Heidelberg 2005
Springer
Edition1ère éd
SeriesLecture Notes in Computer Science
Subjects
Applied sciences
Computer science; control theory; systems
DBM subtraction
Exact sciences and technology
Prioritized timed automata
Software
Software engineering
zone merging
zone reduction
Arbitration
Priority
Program analysis
Modeling
Timed system
Real time system
Non determinism
Program verification
Subtraction
Timed automata
Model specification
Model checking
Automatic analysis
Database management system
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Summary:Priorities are often used to resolve conflicts in timed systems. However, priorities are not directly supported by state-of-art model checkers. Often, a designer has to either abstract the priorities leading to a high degree of non-determinism or model the priorities using existing primitives. In this work, it is shown how prioritized timed automata can make modelling prioritized timed systems easier through the support for priority specification and model checking. The verification of prioritized timed automata requires a subtraction operation to be performed on two clock zones, represented by DBMs, for which we propose an algorithm to generate the minimal number of zones partitioned. After the application of a series of DBM subtraction operations, the number of zones generated become large. We thus propose an algorithm to reduce the final number of zones partitioned by merging some of them. A typical bus arbitration example is used to illustrate the benefits of the proposed algorithms. Due to the support for prioritization and zone reduction, we observe that there is a 50% reduction in the number of modes and 44% reduction in the number of transitions.
ISBN:9783540292098
3540292098
ISSN:0302-9743
1611-3349
DOI:10.1007/11562948_28