Investigation of 65 nm CMOS transistor local variation using a FET array

• Published in: Solid-state electronics Vol. 52; no. 8; pp. 1244 - 1248
• Main Authors: XU, Y. Z, CHEN, C. S, WATT, J. T
• Format: Journal Article
• Language: English
• Published: Oxford Elsevier Science 01.08.2008
• Subjects: Applied sciences; Design. Technologies. Operation analysis. Testing; Electronics; Exact sciences and technology; Integrated circuits; Integrated circuits by function (including memories and processors); Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Transistors; Static random access memory; MOSFET; Random access memory; PMOS technology; Proximity effect; Mismatching; SRAM; Field effect transistor; Complementary MOS transistor; Complementary MOS technology; Integrated circuit; Process variation; NMOS technology; Mismatch
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/j.sse.2008.06.002