Linking EUV lithography line edge roughness and 16 nm NAND memory performance
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Published in | Microelectronic engineering Vol. 98; pp. 24 - 28 |
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Main Authors | , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
Amsterdam
Elsevier
01.10.2012
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Subjects | |
Online Access | Get full text |
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ISSN: | 0167-9317 1873-5568 |
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DOI: | 10.1016/j.mee.2012.04.013 |