Good Endurance and Memory Window for Ti/HfOx Pillar RRAM at 50-nm Scale by Optimal Encapsulation Layer
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Published in | IEEE electron device letters Vol. 32; no. 3; pp. 390 - 392 |
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Main Authors | , , , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
Institute of Electrical and Electronics Engineers
01.03.2011
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Subjects | |
Online Access | Get full text |
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ISSN: | 0741-3106 1558-0563 |
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DOI: | 10.1109/LED.2010.2099201 |