Development of a readout system for the PANDA Micro Vertex Detector
The Micro Vertex Detector (MVD) is the innermost tracking detector of the PANDA (antiProton Annihilation at Darmstadt) experiment at the upcoming FAIR (Facility for Antiproton and Ion Research) facility in Darmstadt. The detector consists of four barrel and six disk layers of silicon pixel and strip...
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Published in | Journal of instrumentation Vol. 7; pp. 1 - 8 |
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Main Authors | , , , , , |
Format | Journal Article |
Language | English |
Published |
01.01.2013
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Subjects | |
Online Access | Get full text |
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Summary: | The Micro Vertex Detector (MVD) is the innermost tracking detector of the PANDA (antiProton Annihilation at Darmstadt) experiment at the upcoming FAIR (Facility for Antiproton and Ion Research) facility in Darmstadt. The detector consists of four barrel and six disk layers of silicon pixel and strip sensors to obtain precise tracking of charged particles. For the development of a front-end ASIC a flexible and powerful readout system was designed to test different ASIC prototypes. We will present the upgrade of the FPGA-based Juelich Digital Readout System and measurements of the recent MVD pixel front-end prototype ToPix3. Tests of the implementation of the radiation hard GBT transfer protocol are also shown. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 ObjectType-Article-1 ObjectType-Feature-2 |
ISSN: | 1748-0221 |
DOI: | 10.1088/1748-0221/8/01/C01043 |