Advanced ATM switching system hardware technology using MCM-D, stacking RAM micro-processor module

• Published in: Proceedings / Electronic Components Conference
• Main Authors: Yamanaka, Naoaki, Kawamura, Tomoaki, Kaizu, Katsumi, Harada, Akio
• Format: Journal Article
• Language: English
• Published: 01.01.1998
• ISSN: 0569-5503
• DOI: 10.1109/ECTC.1998.678812

This paper describes newly developed advanced ATM switching system hardware structures based on MCM-D micro-processor modules. The Si-Substrate MCM-D technology which integrates micro-processor, interface control and peripheral control custom VLSIs, high-speed S-RAMs, and FPGAs (Field Programmable Gate Arrays) is employed. An MCM-D micro-processor module is realized by combining a Motorola 68030, high-performance ASICs, and high-speed S-RAM caches. This is made possible by high density packaging and high-speed 4M-byte with parity cache using 25 ns access to 4-Mbit of S-RAM memory. The MCM employs 12 S-RAMs, possible with the stacked RAM technique, to reduce the module size by 7/8 compared to conventional surface mounting modules. This micro-processor module technology and MCM technology will advance the development of practical B-ISDN ATM switching systems.