A Novel Field-Plated Lateral β -Ga2O3 MOSFET Featuring Self-Aligned Vertical Gate Structure

• Published in: IEEE transactions on electron devices Vol. 70; no. 8; p. 4309
• Main Authors: Gao, Meng, Huang, Huolin, Yin, Luqiao, Lu, Xiuzhen, Zhang, Jianhua, Ren, Kailin
• Format: Journal Article
• Language: English
• Published: New York The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01.08.2023
• Subjects: Buffer layers; Electric fields; Figure of merit; Gallium oxides; MOSFETs; Photolithography; Self alignment; Thickness; Threshold voltage; Transconductance
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2023.3289133

Beta-gallium oxide ([Formula Omitted]-Ga2O3) MOSFETs with excellent power figure of merit have been intensively investigated in recent years. In this article, a novel lateral MOSFET structure featuring a trenched vertical gate (VG) with a gate field plate is proposed and investigated, and two approaches for achieving self-aligned VG and the corresponding process flows are delivered. The channel length of this structure is determined by the trench height instead of the feature dimension limited by photolithography in a conventional lateral device, thus improving performances such as ON-state current and transconductance. It is verified by TCAD simulations that [Formula Omitted]-Ga2O3 normally- ON MOSFET with higher drain current and larger transconductance compared with the conventional lateral recess-gate MOSFETs can be achieved by varying the channel layer thickness. Moreover, a normally- OFF device with a threshold voltage of +0.65 V is obtained when the etching depth of the UID-Ga2O3 buffer layer reached 220 nm. The field plate plays an important role in increasing the breakdown voltage by modulating the electric field distribution in this structure. The proposed structure is expected to provide a promising path for realizing [Formula Omitted]-Ga2O3 enhancement-mode (E-mode) MOSFETs with high drain current.