A 256x256 separable transform CMOS imager

This paper discusses a 256times256 computational imager capable of performing separable transforms. Unlike traditional imagers, this imager performs computation on-chip and in- pixel. The primary computation performed is a separable matrix transforma [abstract truncated by publisher].

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Bibliographic Details
Published in2008 IEEE International Symposium on Circuits and Systems pp. 1420 - 1423
Main Authors Robucci, R, Gray, J, Abramson, D, Hasler, P E
Format Journal Article
LanguageEnglish
Published 01.01.2008
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Summary:This paper discusses a 256times256 computational imager capable of performing separable transforms. Unlike traditional imagers, this imager performs computation on-chip and in- pixel. The primary computation performed is a separable matrix transforma [abstract truncated by publisher].
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISBN:9781424416837
1424416833
DOI:10.1109/ISCAS.2008.4541694