Design and Fabrication of a Low-cost Wafer-level Packaging for RF Devices

This paper presents the structure and process technology of simple and low-cost wafer-level packaging (WLP) for thin film radio frequency (RF) devices. Low-cost practical micromachining processes were proposed as an alternative to high-cost processes, such as silicon deep reactive ion etching (DRIE)...

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Bibliographic Details
Published inTransactions on electrical and electronic materials Vol. 15; no. 2; pp. 91 - 95
Main Authors Lim, Jae-Hwan, Ryu, Jee-Youl, Choi, Hyun-Jin, Choi, Woo-Chang
Format Journal Article
LanguageKorean
Published 한국전기전자재료학회 25.04.2014
Subjects
Au-Sn bonding
Electrical through-connection
Hermetic sealing
Highly productive process
Wafer-Level packaging
Electrical through-connection
Highly productive process
Hermetic sealing
Wafer-level packaging
Au-Sn bonding
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Summary:This paper presents the structure and process technology of simple and low-cost wafer-level packaging (WLP) for thin film radio frequency (RF) devices. Low-cost practical micromachining processes were proposed as an alternative to high-cost processes, such as silicon deep reactive ion etching (DRIE) or electro-plating, in order to reduce the fabrication cost. Gold (Au)/Tin (Sn) alloy was utilized as the solder material for bonding and hermetic sealing. The small size fabricated WLP of 1.04×1.04×0.4 mm3 had an average shear strength of 10.425 kg/mm2, and the leakage rate of all chips was lower than 1.2×10-5 atm.cc/sec. These results met Military Standards 883F (MIL-STD-883F). As the newly proposed WLP structure is simple, and its process technology is inexpensive, the fabricated WLP is a good candidate for thin film type RF devices.
Bibliography:The Korean Institute of Electrical and Electronic Material Engineers
KISTI1.1003/JNL.JAKO201413252437202
ISSN:1229-7607
2092-7592