Opportunities for Built-In Self-Test Within Emerging mm-Wave Phased-Array and MIMO Architectures

As mm-wave phased-array and MIMO systems scale in complexity and integration, testing and ensuring their reliability becomes increasingly challenging. Traditional external test approaches are costly, time-consuming, and often fail to reflect real-world operating conditions. Built-in self-test (BIST)...

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Bibliographic Details
Published inProceedings - IEEE VLSI Test Symposium pp. 1 - 5
Main Author Reiskarimian, Negar
Format Conference Proceeding
LanguageEnglish
Published IEEE 28.04.2025
Subjects
BIST
blocker-tolerant
Built-in self-test
Interference
MIMO
mm-wave
multiple-input multiple-output
nonreciprocal phase-shifter
phased-array
Receivers
Runtime
Sensors
System analysis and design
System-on-chip
Transceivers
Very large scale integration
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Summary:As mm-wave phased-array and MIMO systems scale in complexity and integration, testing and ensuring their reliability becomes increasingly challenging. Traditional external test approaches are costly, time-consuming, and often fail to reflect real-world operating conditions. Built-in self-test (BIST) techniques offer a promising solution by enabling low-overhead, on-chip testing. This paper reviews existing BIST strategies for mm-wave systems and further highlights emerging architectures that blur the line between test and operation. A key example is a recently demonstrated spatial notch filtering (SNF) architecture, which leverages nonreciprocal phase shifters to cancel spatial interference at the earliest opportunity within the receiver chain. By repurposing such structures, these emerging systems have the potential to enable BIST functionality without additional area penalty. The convergence of BIST and advanced receiver architectures offers a compelling path toward more scalable, efficient, and robust mm-wave system design.
ISSN:2375-1053
DOI:10.1109/VTS65138.2025.11022907