HARD: Hardening Real-Time Scheduling and Analysis for Accelerator Enabled Computing

• Published in: Proceedings / IEEE Real-Time and Embedded Technology and Applications Symposium pp. 389 - 401
• Main Authors: Ni, Yinchen, Ma, Tianrui, Chen, Jintao, Yang, Chongye, Ye, Siwei, Xu, Yuankai, Jin, Yier, Zou, An
• Format: Conference Proceeding
• Language: English
• Published: IEEE 06.05.2025
• Subjects: Accelerator; Computer architecture; Heterogeneous Architecture; Kernel; Neural networks; Processor scheduling; Real-time Scheduling; Real-time systems; Resource management; Response Time Analysis; Runtime; Scheduling algorithms; Time factors; Timing
• ISSN: 2642-7346
• DOI: 10.1109/RTAS65571.2025.00043

Despite the advancements in supporting artificial intelligence, accelerator-enabled computing architectures still struggle to meet strict timing constraints due to the complex interactions between CPU cores and accelerators. Although various scheduling and response-time analysis techniques have been developed, a significant gap remains between the conservative hard real-time schedulability (i.e., worst-case response times) and the average measured schedulability on real systems. This pessimism significantly limits the deployment of hard real-time tasks on accelerator-enabled computing platforms. To address this, we propose HARD, a real-time scheduling approach that integrates scheduling strategies, response time analysis, and practical scheduler designs for general accelerator-enabled computing platforms. Benefiting the subtask level segmented characteristics that are ignored by classic schedulers, the proposed HARD can significantly improve the theoretically guaranteed hard real-time schedulability. Extensive experiments on off-the-shelf Intel CPUs and NVIDIA GPUs show that HARD outperforms state-of-the-art scheduling and analysis approaches, delivering a 11.3% improvement in hard real-time schedulability and a remarkable 45.1 % reduction in pessimism.