Networks-on-Chip: Challenges, trends and mechanisms for enhancements

The rate of increase of silicon capacity in integrated circuits (IC) will enable system integration of several billion transistors to reside on a single chip in the near future. Future system-on-chip (SoC) systems must therefore integrate up to several hundreds of cores within a single chip, and SoC...

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Bibliographic Details
Published in2009 International Conference on Information and Communication Technologies pp. 57 - 62
Main Author Tayan, O.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2009
Subjects
Bandwidth
Communication networks
Computer science
Crosstalk
Electromagnetic interference
Integrated circuit interconnections
Network-on-a-chip
System-on-a-chip
Wires
Wiring
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Summary:The rate of increase of silicon capacity in integrated circuits (IC) will enable system integration of several billion transistors to reside on a single chip in the near future. Future system-on-chip (SoC) systems must therefore integrate up to several hundreds of cores within a single chip, and SoC designs will employ on-chip communication networks (NoCs) as a result. This paper discusses the problems with many current SoC systems, surveys the challenges and trends facing future SoC designs and proposes a mechanism for enhancing NoC strategies of the future by enhancing memory management and utilization techniques within an NoC.
ISBN:9781424446087
1424446082
DOI:10.1109/ICICT.2009.5267214