Application specific image processor for the extension of the dynamic range of images with multiple resolutions

A new processor is proposed, capable to expand the dynamic range of input images in real-time. With respect to the existent literature, the processor presents the unique feature of elaborating images at different resolutions, up to 4K UHDTV, by deriving a specific algorithm from the most effective m...

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Bibliographic Details
Published in2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) pp. 700 - 703
Main Authors Licciardo, Gian Domenico, Cappetta, Carmine, Di Benedetto, Luigi
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2016
Subjects
Buffer storage
Dynamic range
Field programmable gate arrays
Filter banks
FPGA
image processing
Image resolution
inverse-tone mapping
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Summary:A new processor is proposed, capable to expand the dynamic range of input images in real-time. With respect to the existent literature, the processor presents the unique feature of elaborating images at different resolutions, up to 4K UHDTV, by deriving a specific algorithm from the most effective methods presented in the literature. Additionally, the proposed design is capable to elaborate the input pixel in streaming order, as they come from input devices by avoiding frame buffers and eliminating external DRAM. The processor complexity can be configured with different area/speed ratios in order to meet the requirements of different FPGA platforms. Implemented on a high-end FPGA the processor exhibits a latency of 32.4ms (31 fps), while a 4K frame requires 129ms (8 fps) to be processed.
DOI:10.1109/ICECS.2016.7841298