A 500nA quiescent current, trim-free, ±1.75% absolute accuracy, CMOS-only voltage reference based on anti-doped N-channel MOSFETs

In this paper, an ultra low power CMOS-only voltage reference is presented. The reference exploits the work function difference between anti-doped (flipped-gate) and standard-doped nMOS devices. These devices require no additional processing and are realizable from the basic N+ and P+ implants used...

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Bibliographic Details
Published inProceedings of the IEEE 2014 Custom Integrated Circuits Conference pp. 1 - 4
Main Authors Al-Shyoukh, Mohammad, Kalnitsky, Alex
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2014
Subjects
Accuracy
Anti-Doped
CMOS integrated circuits
CMOS Voltage Reference
Logic gates
Low Quiescent Current
MOS devices
Resistance
Silicon
Temperature measurement
Trim
Trim-Free
Work-Function
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Summary:In this paper, an ultra low power CMOS-only voltage reference is presented. The reference exploits the work function difference between anti-doped (flipped-gate) and standard-doped nMOS devices. These devices require no additional processing and are realizable from the basic N+ and P+ implants used to implement the standard enhancement mode MOS devices on the process. The reference is implemented as a temperature-compensated ΔV gs between anti-doped and standard-doped nMOS devices. Integrated on 0.18μm CMOS, the reference occupies less than 0.04mm 2 on silicon, requires less than 500nA of quiescent current, and has a trim-free accuracy of ±1.75% which is comparable to that of the most well-behaved voltage references employing BJTs.
ISSN:0886-5930
2152-3630
DOI:10.1109/CICC.2014.6946007