Second-order ΔΣAD modulator with novel feedforward architecture

• Published in: 2007 50th Midwest Symposium on Circuits and Systems pp. 148 - 151
• Main Authors: Hao San, Konagaya, H., Feng Xu, Motozawa, A., Kobayashi, H., Ando, K., Yoshida, H., Murayama, C.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.08.2007
• Subjects: Circuit noise; Circuit topology; Delta modulation; Dynamic range; Feedback; Filters; Harmonic distortion; Noise shaping; Signal resolution; Signal to noise ratio
• ISBN: 1424411750; 9781424411757
• ISSN: 1548-3746; 1558-3899
• DOI: 10.1109/MWSCAS.2007.4488558

This paper proposes novel feedforward architecture of a second-order DeltaSigmaAD modulator with single DAC- feedback topology. DeltaSigmaAD modulator realizes high resolution by oversampling and noise shaping technique. However, its SNDR (signal to noise and distortion ratio) is limited by the dynamic range of the input signal and non-idealities of building blocks, particularly by the harmonic distortion in amplifier circuits. Compared with a feed backed DeltaSigmaAD modulator, in a full feedforward DeltaSigmaAD modulator structure, the signal transfer function is unity under ideal circumstances. It means that the signal swings through the loop filter become smaller. Therefore, the harmonic distortion generated inside the loop filter can be significantly reduced because the effect of non-idealities in amplifiers can be suppressed when signal swing is small. Moreover, the reduction of the internal signal swings also relaxes output swing requirement for amplifiers in low-voltage design. However, in conventional feedforward DeltaSigmaAD modulator, an analog adder is needed before quantizer. Especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals, which leads to large chip area and extra power dissipation. In this paper, we propose a novel architecture of a feedforward DeltaSigmaAD modulator. It realizes the summation of feedforward signals without additional amplifier that is equivalent to the conventional one but smaller chip area and low-power dissipation. We also conducted MATLAB and SPICE simulations to verify the proposed architecture and modulator circuits.