Software radio system design based on FPGA

Currently software defined radio (SDR) is implemented by using DSP only or by using DSP plus FPGA chip. For DSP processing speed of the bottleneck problem, a complete FPGA IF software radio implementation is proposed in this paper. Traditional solutions use only FPGA for digital up and down conversi...

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Bibliographic Details
Published in2016 2nd IEEE International Conference on Computer and Communications (ICCC) pp. 2655 - 2658
Main Authors Dan Huang, Ji-Yang Yu, Guang-Yun Li
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2016
Subjects
CPU
Demodulation
Digital signal processing
Field programmable gate arrays
FPGA
Frequency conversion
Instruments
Power harmonic filters
SDR
software defined radio
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Summary:Currently software defined radio (SDR) is implemented by using DSP only or by using DSP plus FPGA chip. For DSP processing speed of the bottleneck problem, a complete FPGA IF software radio implementation is proposed in this paper. Traditional solutions use only FPGA for digital up and down conversion, modulation and demodulation; design proposed in this paper based on the FPGA chip, a CPU processor for SDR is designed. By using this processor, the full realization of all digital signal processing algorithms on software radio is implemented by FGPA only. Because of the full use of FPGA to implement software radio, so that the system power consumption is smaller, to solve the needs of software radio for defined power. In this paper, based on the FPGA chip CPU design method, the proposed greatly reduces the difficulty of FPGA development; the use of C language and assembly language to develop digital signal processing on FPGA platform, greatly reducing system development time.
DOI:10.1109/CompComm.2016.7925179