Loop Chaining: A Programming Abstraction for Balancing Locality and Parallelism

• Published in: 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum pp. 375 - 384
• Main Authors: Krieger, Christopher D., Strout, Michelle Mills, Olschanowsky, Catherine, Stone, Andrew, Guzik, Stephen, Xinfeng Gao, Bertolli, Carlo, Kelly, Paul H. J., Mudalige, Gihan, Van Straalen, Brian, Williams, Sam
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2013
• Subjects: Jacobian matrices; Libraries; Optimization; Parallel processing; Schedules; Sparse matrices; Vectors
• DOI: 10.1109/IPDPSW.2013.68

There is a significant, established code base in the scientific computing community. Some of these codes have been parallelized already but are now encountering scalability issues due to poor data locality, inefficient data distributions, or load imbalance. In this work, we introduce a new abstraction called loop chaining in which a sequence of parallel and/or reduction loops that explicitly share data are grouped together into a chain. Once specified, a chain of loops can be viewed as a set of iterations under a partial ordering. This partial ordering is dictated by data dependencies that, as part of the abstraction, are exposed, thereby avoiding inter-procedural program analysis. Thus a loop chain is a partially ordered set of iterations that makes scheduling and determining data distributions across loops possible for a compiler and/or run-time system. The flexibility of being able to schedule across loops enables better management of the data locality and parallelism tradeoff. In this paper, we define the loop chaining concept and present three case studies using loop chains in scientific codes: the sparse matrix Jacobi benchmark, a domain-specific library, OP2, used in full applications with unstructured grids, and a domain-specific library, Chombo, used in full applications with structured grids. Preliminary results for the Jacobi benchmark show that a loop chain enabled optimization, full sparse tiling, results in a speedup of as much as 2.68x over a parallelized, blocked implementation on a multicore system with 40 cores.