Implementation of a control strategy for PFC with FPGA
This paper presents the study and implementation of a single-phase pre-regulator rectifier with digital control using the FPGA technology. The control technique used aims to obtain power factor correction (PFC) based on average current mode control. The rectifier is a single-phase voltage doubler wi...
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Published in | 2007 European Conference on Power Electronics and Applications pp. 1 - 9 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.09.2007
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Subjects | |
Online Access | Get full text |
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Summary: | This paper presents the study and implementation of a single-phase pre-regulator rectifier with digital control using the FPGA technology. The control technique used aims to obtain power factor correction (PFC) based on average current mode control. The rectifier is a single-phase voltage doubler with a center tap at the voltage output. The FPGA used in the project is an ALTERAreg Cyclone II EP2C35F672C6, present on the kit DE2, which is a low-cost FPGA with low-consumption at a great speed. The output power of prototype implemented was around 1000 W. In this project it was just considered the use of the current loop, in other words, just the control of the input current was implemented. The regulation of the output voltages was implemented in another paper using DSP, according to [4]. |
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DOI: | 10.1109/EPE.2007.4417739 |