Ultra-low voltage (0.1V) operation of Vth self-adjusting MOSFET and SRAM cell

A V th self-adjusting MOSFET consisting of floating gate is proposed and the ultra-low voltage operation of the V th self-adjustment and SRAM cell at as low as 0.1V is successfully demonstrated. In this device, V th automatically decreases at on-state and increases at off-state, resulting in high I...

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Published in2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers pp. 1 - 2
Main Authors Ueda, Akitsugu, Seung-Min Jung, Mizutani, Tomoko, Kumar, Anil, Saraya, Takuya, Hiramoto, Toshiro
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2014
Subjects
Circuit stability
MOSFET
SRAM cells
Very large scale integration
Voltage measurement
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Summary:A V th self-adjusting MOSFET consisting of floating gate is proposed and the ultra-low voltage operation of the V th self-adjustment and SRAM cell at as low as 0.1V is successfully demonstrated. In this device, V th automatically decreases at on-state and increases at off-state, resulting in high I on /I off ratio as well as stable SRAM operation at low V dd . The minimum operation voltage at 0.1V is experimentally demonstrated in 6T SRAM cell with V th self-adjusting nFETs and pFETs.
ISBN:9781479933310
1479933317
ISSN:0743-1562
DOI:10.1109/VLSIT.2014.6894416