Innovated ultra-thin and super fine-pitch panel RDL substrate manufacturing for advanced package

• Published in: 2017 International Conference on Electronics Packaging (ICEP) pp. 16 - 18
• Main Authors: Yu-Hua Chen, Lin, Puru Bruce, Cheng-Ta Ko, Tzyy-Jang Tseng
• Format: Conference Proceeding
• Language: English
• Published: Japan Institute of Electronics Packaging 01.04.2017
• Subjects: Compounds; epoxy compound; Fabrication; fan-out; Glass; Integrated circuits; Metals; panel level; RDL-first; Simulation; Substrates
• DOI: 10.23919/ICEP.2017.7939313

The rapid development of semiconductor technology and multi-function demands of end products has driven IC foundry industry toward 7nm node process, and even next generation of 5nm. The I/O pitch of chip is reduced accordingly but the Build-up layer of IC carrier is still too large to fit interconnects. In order to overcome the gap of I/O pitch between IC chip and carrier, the interposer technology has been considered as a solution to resolve the issue. However, the cost of silicon interposer is too high, and the glass interposer lacks the associated infrastructure and is difficult to be handled, which makes the technology drawback to the market application. Alternatively, fan-out wafer/panel level package technology is getting more attractions for advanced package recently since its features of low profile, small form factor, and high bandwidth with fine line RDL routability. In this study, a RDL-first (chip-last) fan-out panel level structure on releasing film was fabricating of three-layer dielectric panel level fan-out, where 370mm×470mm panel size is applied, is also demonstrated to compare with the simulation results.