Implementing combined finite state machine with heterogeneous field programmable gate array
The subject of research in this article is the logical circuit of the combined finite state machine (CFSM), which combines the functions of both finite state machine Mealy and Moore. The article considers the problem of logical optimization of the CFSM implemented in field programmable gate array (F...
Saved in:
Published in | 2018 14th International Conference on Advanced Trends in Radioelecrtronics, Telecommunications and Computer Engineering (TCSET) pp. 1184 - 1187 |
---|---|
Main Author | |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.02.2018
|
Subjects | |
Online Access | Get full text |
DOI | 10.1109/TCSET.2018.8336406 |
Cover
Loading…
Abstract | The subject of research in this article is the logical circuit of the combined finite state machine (CFSM), which combines the functions of both finite state machine Mealy and Moore. The article considers the problem of logical optimization of the CFSM implemented in field programmable gate array (FPGA) basis. The CFSM scheme is implemented in table-type elements and embedded memory blocks. The number of elements in the scheme depends on the combination of the parameters of the CFSM. The article proposes a method for CFSM optimization by area using the heterogeneous FPGA with embedded memory. |
---|---|
AbstractList | The subject of research in this article is the logical circuit of the combined finite state machine (CFSM), which combines the functions of both finite state machine Mealy and Moore. The article considers the problem of logical optimization of the CFSM implemented in field programmable gate array (FPGA) basis. The CFSM scheme is implemented in table-type elements and embedded memory blocks. The number of elements in the scheme depends on the combination of the parameters of the CFSM. The article proposes a method for CFSM optimization by area using the heterogeneous FPGA with embedded memory. |
Author | Hrushko, Svitlana |
Author_xml | – sequence: 1 givenname: Svitlana surname: Hrushko fullname: Hrushko, Svitlana organization: Department of Computer Systems and Networks of ZNTU, Zaporizhzhya National Technical University, Zaporizhzhya, Ukraine |
BookMark | eNotj01LxDAYhCPoQdf9A3rJH2jNRz-So5RVFxb2YG8eljfJ2zbQpEtakf33VtzLDDzMDMwDuY1TREKeOMs5Z_qlbT53bS4YV7mSsipYdUO2ula8lKoSZVnpe_K1D-cRA8bFx57aKRgf0dHOR78gnRdYNYAdVkp__DLQARdMU48Rp-95zeHo6HkFCUIAMyLt_yqQElweyV0H44zbq29I-7Zrm4_scHzfN6-HzGu2ZMi1cQVK0RW8E5o5V2pwwthaCi262oIpFVhbmQ4KIZlBqJ3Wytaa26pmckOe_2c9Ip7OyQdIl9P1sfwFVBdSeA |
ContentType | Conference Proceeding |
DBID | 6IE 6IL CBEJK RIE RIL |
DOI | 10.1109/TCSET.2018.8336406 |
DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/ sourceTypes: Publisher |
DeliveryMethod | fulltext_linktorsrc |
EISBN | 9781538625569 1538625563 |
EndPage | 1187 |
ExternalDocumentID | 8336406 |
Genre | orig-research |
GroupedDBID | 6IE 6IL CBEJK RIE RIL |
ID | FETCH-LOGICAL-i90t-e19bd4e32f41f290dd59ad2bc73292f7cab58acc6bfa4230bea7d998c791c6703 |
IEDL.DBID | RIE |
IngestDate | Thu Jun 29 18:39:46 EDT 2023 |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-LOGICAL-i90t-e19bd4e32f41f290dd59ad2bc73292f7cab58acc6bfa4230bea7d998c791c6703 |
PageCount | 4 |
ParticipantIDs | ieee_primary_8336406 |
PublicationCentury | 2000 |
PublicationDate | 2018-Feb. |
PublicationDateYYYYMMDD | 2018-02-01 |
PublicationDate_xml | – month: 02 year: 2018 text: 2018-Feb. |
PublicationDecade | 2010 |
PublicationTitle | 2018 14th International Conference on Advanced Trends in Radioelecrtronics, Telecommunications and Computer Engineering (TCSET) |
PublicationTitleAbbrev | TCSET |
PublicationYear | 2018 |
Publisher | IEEE |
Publisher_xml | – name: IEEE |
Score | 1.6538832 |
Snippet | The subject of research in this article is the logical circuit of the combined finite state machine (CFSM), which combines the functions of both finite state... |
SourceID | ieee |
SourceType | Publisher |
StartPage | 1184 |
SubjectTerms | combined FSM Cyclones embedded memory Field programmable gate arrays FPGA implementation LUT RAM Random access memory Table lookup |
Title | Implementing combined finite state machine with heterogeneous field programmable gate array |
URI | https://ieeexplore.ieee.org/document/8336406 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjZ3PS8MwFMfD3MmTyib-JgePtmvTJG3OY2MIE8EKAw8jP150yDoZ3WH-9SZpN1E8eCul0JIfvHxfP9_3ELpV3MicChqlrNBOoBQykpDxiEiW2swFbAi9AacPfPJM72ds1kF3ey8MAAT4DGJ_Gf7lm5Xe-FTZoMgyTn197QMn3Bqv1s4Hk4hBOXwalR7WKuL2wR8dU0LAGB-h6e5VDSfyHm9qFevPX1UY__stx6j_bc3Dj_ugc4I6UPXQS6jxG8Cf6hW7NeTkLhhsF_5AiYNnCC8DNQnYJ17xm4dgVm7tgBP-OFBsuCW1lt5LhX1yDcv1Wm77qByPyuEkarsmRAuR1BGkQhkKGbE0tUQkxjAhDVE6z4ggNtdSsUJqzZWV7iiVKJC5cZpL5yLV3O3_U9StVhWcIUyM5lSqnHGpqVM6UivGDCSGUeV0pT1HPT8u84-mLsa8HZKLv29fokM_Nw3xfIW69XoD1y6g1-omzOQXYsqlUA |
linkProvider | IEEE |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV3PS8MwFA5jHvSksom_zcGj7fojSZvz2Ji6DcEKAw8jP151yFoZ3UH_epO0mygevIUSaEke-fK9ft97CF1LpkVCOPFCmipDUFLhCYiZFwka5rEBbHC9ASdTNnoidzM6a6GbrRcGAJz4DHw7dP_ydanWNlXWS-OYEVtfe8fgPuG1W2vjhAl4L-s_DjIr10r9ZuqPnikOMob7aLJ5Wa0UefPXlfTV5686jP_9mgPU_Tbn4Yct7ByiFhQd9Oyq_DrpT_GCTRQZwgsa5wt7pcTONYSXTjcJ2KZe8auVwZQmesBQf-x0bLjRai2tmwrb9BoWq5X46KJsOMj6I6_pm-AteFB5EHKpCcRRTsI84oHWlAsdSZXEEY_yRAlJU6EUk7kwl6lAgki0YV0q4aFi5gQ4Qu2iLOAY4UgrRoRMKBOKGK4jlKRUQ6ApkYZZ5ieoY9dl_l5Xxpg3S3L69-MrtDvKJuP5-HZ6f4b27D7V-udz1K5Wa7gw8F7JS7erXzqXqKA |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2018+14th+International+Conference+on+Advanced+Trends+in+Radioelecrtronics%2C+Telecommunications+and+Computer+Engineering+%28TCSET%29&rft.atitle=Implementing+combined+finite+state+machine+with+heterogeneous+field+programmable+gate+array&rft.au=Hrushko%2C+Svitlana&rft.date=2018-02-01&rft.pub=IEEE&rft.spage=1184&rft.epage=1187&rft_id=info:doi/10.1109%2FTCSET.2018.8336406&rft.externalDocID=8336406 |